Embodiments of the present invention relate generally to semiconductor devices, and more particularly to a structure and method of reducing defect density in materials heteroepitaxially grown on a semiconductor substrate using a rotated double aspect ratio trapping (ART) process.
Heteroepitaxial growth of lattice-mismatched layers (i.e., germanium on silicon, Group III-V compounds on silicon, Group III-V compounds on germanium) have practical applications in advanced complementary metal oxide semiconductor (CMOS) technologies. However, it is challenging to integrate germanium or Group III-V compounds into conventional substrates made of silicon and/or other crystalline dielectric materials using conventional fabrication methods because the mismatch between the crystalline lattice structures of the two materials may lead to high defect formation in the resulting epitaxial structure. The lattice-mismatch creates dislocations, which are crystallographic defects formed during growth of a crystal structure, that ultimately affect the properties of the fabricated crystalline structure.
One conventional approach to reducing dislocations in epitaxially grown crystalline structures is aspect ratio trapping (“ART”). ART is an epitaxial deposition procedure of growing lattice mismatched semiconductor structures in a trench, whereby epitaxy defects are trapped at the trench bottom. However, even with the ART procedure, a considerable amount of defects may still propagate to the surface of the epitaxy in a direction parallel to the trench, with these defects affecting the quality of the epitaxially grown crystalline structure.